1. Field of the Invention
The invention relates to the field of data processing devices using virtual machine instructions.
2. Related Art
A processor core normally is capable of executing instructions from a native instruction set only. For various reasons it is desirable that such a processor core is able to process programs expressed in an other instruction set than this native instruction set. In this way a standard processor core may be used without hardware modifications for example to emulate processing by a different processor core, e.g. a core for executing Java instructions. Such another instruction set in which a program is expressed, but which is not the native instruction set whose instructions the processor core is capable of executing, will be called a virtual machine instruction set.
Conventionally, processing of instructions from the virtual machine instruction set is realized by means of an interpreter program which is executed by the processor core. This is exemplified by U.S. Pat. No. 4,443,865. For each virtual machine instruction the interpreter program contains a corresponding execution program expressed in native instructions. The interpreter causes the processor core to read a virtual machine instruction from memory, to select the address of the execution program for the virtual machine instruction and to transfer control of the processor core to that execution program. Such processing by means of an interpreter is intrinsically slower than direct execution, because the processor core needs to spend processing cycles on the selection of addresses of execution programs and transfer of control in addition to the processing cycles needed to perform the functional tasks of the execution program.
It has been found that translation of virtual machine instructions by a preprocessor, although generally satisfactory, reduces the flexibility of the definition of the meaning of virtual machine instructions and that a few of the virtual machine instructions require excessive memory in the preprocessor.